Digital Design Engineer

Radical Semiconductor just accomplished a computational breakthrough. We have developed a fundamentally new way to accelerate cryptographic algorithms with the latest advancements in processing-in-memory technology. We made 100 test chips back in March of 2022. They worked. And now it’s time to bring this architecture to market.

With your help, we are going to create a post-quantum, crypto-native smart card called the Radical Card. It can act as a cryptocurrency hardware wallet, as a conventional credit card, as a secure proof-of-identity, and as a platform for custom applications designed to leverage its powerful cryptographic capabilities. Together, we will bring this technology into a form factor that’s cheaper, more secure, and just as easy to use as a conventional credit card.

We are looking for highly skilled, motivated, interdisciplinary, and diverse chip engineers to help us build our very first market-ready chips. As an engineer in the earliest stages of Radical, your voice will be heard, and your decisions will impact the chip that will one day end up in everyone’s wallet.

As a Digital Design Engineer, you will work on Radical’s digital design team to contribute to chip architecture, micro-architecture, RTL design, and verification.

You should have a track record of impressive digital design work, either in academia or in industry. You should be able to design a complex digital block from a plain-English specification, develop testbenches with sufficient coverage to ensure functionality, and properly integrate that block into a larger system, without significant oversight.

It would be great if you have experience working on mixed signal designs, have some analog design work under your belt, and have worked on low-power or ultra-low-power designs, especially with eFlash. It would also be great if you have experience in design verification and/or design automation.

Minimum qualifications:

• BS, MS, or PhD degree in Electrical Engineering or other relevant discipline, or equivalent experience.
• Fluent in Verilog and/or SystemVerilog.
• Fluent in C and/or C++.
• Understanding of best practices for testbench design.
• Experience working with RISC pipelines and architectures.
• Relevant internship or work experience.

Nice-to-have qualifications:

• Experience with analog schematic design and layout in Cadence Virtuoso
• Experience working on mixed-signal systems.
• Understanding of analog-to-digital timing handoff using the Synopsys Liberty format.
• Experience working with low and ultra-low power designs.
• Experience working with eFlash NVM IP.

To comply with U.S. export control laws and regulations, including the Export Administration Regulations (EAR), you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State without sponsorship.