As a member of Design Efficiency Research at Strategic CAD Labs: • Owned many/multi-core CAD algorithms research roadmap; Developed advanced parallel CAD solutions. •...more Conducted technical/market diligence for Intel Capital. • Led metrics-driven methodology improvements for front-end microprocessor design flows.
2008 - 2009 (8 months)
Supervisors: Dr. Desmond Kirkpatrick, Principal Engineer & Dr. Pradeep Dubey, Intel Fellow Evaluated Intel products for CAD, which involved piloting a study to assess...more competition and determining future product specifications.